Scalable vision machines
Summary
NICTA has established a project with a goal of developing technology to map high level descriptions of computer vision algorithms to heterogeneous parallel hardware architectures. This project will look at some research issues that arise from the project, particularly with respect to targeting field programmable gate array (FPGA) platforms.The project will be in collaboration with Dr Rami Mukhtar, and NICTA-enhanced scholarships are available for both projects.
Supervisor(s)
Associate Professor Philip Leong, Associate Professor Craig Jin, Dr Alistair McEwan
Research Location
Electrical and Information Engineering
Program Type
PHD
Synopsis
Reconfigurable Computing Architectures for Acceleration of Functional Languages. Functional languages provide an opportunity to generate parallel implementations from a high level specification. This project would provide a candidate with the opportunity to develop new reconfigurable computing hardware architectures that are well suited for accelerating computations on collections of data (i.e. regular shaped polymorphic arrays see http://research.microsoft.com/en-us/um/people/simonpj/papers/ndp/fsttcs2008.pdf).The work would be driven by recent advances on computations of collections made in the functional language community. The outcomes of this research would be to develop new hardware architectures, supporting tools chains and undertake performance analysis. The candidate would be part of a larger team working to develop a technology for mapping computer vision algorithms to heterogeneous parallel hardware architectures. Hardware Acceleration of Functional Languages. Functional languages provide an opportunity to generate parallel implementations from a high level specification. This project would provide a candidate with the opportunity to develop new methods for mapping functional languages to implementations that target hardware accelerators, including GPGPUs, FPGAs and other reconfigurable computing architectures. The outcomes of this research would be to develop algorithms, methodologies and related software frameworks that make this possible. The candidate would be part of a larger team working to develop a technology for mapping computer vision algorithms to heterogeneous parallel hardware architecture
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Keywords
computer architecture, Computer vision, FPGA, hardware compilation
Opportunity ID
The opportunity ID for this research opportunity is: 1251
Other opportunities with Associate Professor Philip Leong
- other research opportunities available at Faculty of Engineering and Information Technologies
- FPGA-based Low Latency Trading
- Floating Point FPGA Architectures
- Placement-aware Hardware Description Languages
- Modelling Parkinson's disease using control models
- Mapping 2D Images to 3D Shape
- New technique for studying human brain activity
- Next Generation Audio Coding
- Spherical multi-modal scene analysis
- Statistical models of ear shape and ear acoustics
- Medical diagnostics for neonates in the developing world
- Electrical Impedance Tomography for stroke, biophysical monitoring and medical device design
- Impedance tomography for cardiac imaging: high speed tomography
- Novel Electrodes for rapid electrophysiological recording
- Binaural signal processing algorithms for hearing aids
Other opportunities with Associate Professor Craig Jin
- Pattern analysis techniques for sound synthesis
- Interpolation of binaural impulse responses for virtual auditory displays
- Sound field recording and recreation
- Beamforming with acoustic vector sensors - Multiple acoustic source localisation using acoustic vector sensor arrays
- Speech separation and localisation using particle filtering
- Mapping 2D Images to 3D Shape
- New technique for studying human brain activity
- Next Generation Audio Coding
- Spherical multi-modal scene analysis
- Statistical models of ear shape and ear acoustics
- Binaural signal processing algorithms for hearing aids
- Electrical Impedance Tomography for stroke, biophysical monitoring and medical device design
- Impedance tomography for cardiac imaging: high speed tomography
- Medical diagnostics for neonates in the developing world
- FPGA-based Low Latency Trading
- Floating Point FPGA Architectures
- Placement-aware Hardware Description Languages
- Modelling Parkinson's disease using control models
- Novel Electrodes for rapid electrophysiological recording
Other opportunities with Dr Alistair McEwan
- Medical diagnostics for neonates in the developing world
- Electrical Impedance Tomography for stroke, biophysical monitoring and medical device design
- Impedance tomography for cardiac imaging: high speed tomography
- Novel Electrodes for rapid electrophysiological recording
- Mapping 2D Images to 3D Shape
- New technique for studying human brain activity
- Next Generation Audio Coding
- Spherical multi-modal scene analysis
- Statistical models of ear shape and ear acoustics
- FPGA-based Low Latency Trading
- Floating Point FPGA Architectures
- Placement-aware Hardware Description Languages
- Modelling Parkinson's disease using control models
- Binaural signal processing algorithms for hearing aids