Dr David Boland

MEng, PhD
Lecturer in Electrical Engineering
School of Electrical and Information Engineering

J03 - Electrical Engineering Building
The University of Sydney

Telephone +61 2 9351 7230

Website Computer, software and electronic engineering

School of Electrical and Information Engineering

Biographical details

Dr. David Boland completed his MEng. and PhD. at Imperial College London in 2007 and 2012 respectively. He worked at Monash University as a lecturer from 2013 to 2016, before moving to the University of Sydney in 2017.

Selected grants

2017

  • MyIP: 7339 CERA 169 Fast Automated anomaly detection in communication networks. DSTG funded research agreement.; Boland D, Leong P; Defence Science and Technology Group/Client Commissioned Research.

Selected publications

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Book Chapters

  • Constantinides, G., Bayliss, S., Boland, D. (2015). Whither reconfigurable computing? In Wayne Luk, George A Constantindes (Eds.), Transforming Reconfigurable Systems, (pp. 19-38). London: Imperial College Press. [More Information]

Journals

  • Wang, Q., Song, B., Corcoran, B., Boland, D., Zhu, C., Zhuang, L., Lowery, A. (2017). Hardware-efficient signal generation of layered/enhanced ACO-OFDM for short-haul fiber-optic links. Optics Express, 25(12), 13359-13371. [More Information]
  • Shi, K., Boland, D., Constantinides, G. (2015). Imprecise datapath design: An overclocking approach. ACM Transactions on Reconfigurable Technology and Systems, 8(2), 1-23. [More Information]
  • Boland, D., Constantinides, G. (2013). A scalable precision analysis framework. IEEE Transactions on Multimedia, 15(2), 242-256. [More Information]
  • Boland, D., Constantinides, G. (2011). Bounding Variable Values and Round-Off Effects Using Handelman Representations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 30(11), 1691-1704. [More Information]
  • Boland, D., Constantinides, G. (2011). Optimizing Memory Bandwidth Use and Performance for Matrix-Vector Multiplication in Iterative Methods. ACM Transactions on Reconfigurable Technology and Systems, 4(3), 1-14. [More Information]
  • Stamm, R., Boland, D., Hammami, R., Capes, H., Catoire, F., Koubiti, M., Mekkaoui, A., Marandet, Y., Rosato, J., et al (2011). Stochastic processes applied to line shapes. Baltic Astronomy, 20(4), 540-547.

Conferences

  • Shi, K., Boland, D., Constantinides, G. (2016). Efficient FPGA implementation of digit parallel online arithmetic operators. 2014 International Conference on Field- Programmable Technology (ICFPT), Danvers: (IEEE) Institute of Electrical and Electronics Engineers. [More Information]
  • Boland, D. (2016). Reducing memory requirements for high-performance and numerically stable Gaussian elimination. FPGA'16 The 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, New York: Association for Computing Machinery (ACM). [More Information]
  • Shi, K., Boland, D., Stott, E., Bayliss, S., Constantinides, G. (2014). Datapath synthesis for overclocking: Online arithmetic for latency-accuracy trade-offs. 51st Annual Design Automation Conference (DAC 2014), New York: Association for Computing Machinery (ACM). [More Information]
  • Shi, K., Boland, D., Constantinides, G. (2013). Accuracy-performance tradeoffs on an FPGA through overclocking. 21st Annual International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2013), Piscataway: (IEEE) Institute of Electrical and Electronics Engineers. [More Information]
  • Shi, K., Boland, D., Constantinides, G. (2013). Overclocking datapath for latency-error tradeoff. 2013 IEEE International Symposium on Circuits and Systems (ISCAS 2013), Beijing: (IEEE) Institute of Electrical and Electronics Engineers. [More Information]
  • Boland, D., Constantinides, G. (2013). Revisiting the reduction circuit: a case study for simultaneous architecture and precision optimisation. 2013 12th International Conference on Field Programmable Technology (FPT 2013), Piscataway: (IEEE) Institute of Electrical and Electronics Engineers. [More Information]
  • Boland, D., Constantinides, G. (2013). Word-length optimization beyond straight line code. 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2013), New York: Association for Computing Machinery (ACM). [More Information]
  • Boland, D., Constantinides, G. (2012). A Scalable Approach for Automated Precision Analysis. 2012 ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2012), New York: ACM Digital Library. [More Information]
  • Hammami, R., Boland, D., Capes, H., Christova, M., Marandet, Y., Rosato, J., Stamm, R. (2012). A Stark broadening simulation using a renewal process for the electric microfield. XXI International Conference on Spectral Line Shapes (ICSLS 2012), Bristol: IOP Publishing. [More Information]
  • Tan, X., Boland, D., Constantinides, G. (2012). FPGA paranoia: Testing numerical properties of FPGA floating point IP-cores. 8th International Symposium on Applied Reconfigurable Computing (ARC 2012), Berlin: Springer Verlag. [More Information]
  • Le Lann, C., Boland, D., Constantinides, G. (2011). The Krawczyk Algorithm:Rigorous Bounds for Linear Equation Solution on an FPGA. 7th International Symposium on Applied Reconfigurable Computing (ARC 2011), Berlin: Springer Verlag. [More Information]

Reference Works

  • Boland, D., Cheng, C., Kahng, A., Leong, P. (2017). Reconfigurable Computing. In John G Webster (Eds.), Wiley Encyclopedia of Electrical and Electronics Engineering. (pp. 1-17). 10.1002/047134608X.W7603.pub3: Wiley.

2017

  • Wang, Q., Song, B., Corcoran, B., Boland, D., Zhu, C., Zhuang, L., Lowery, A. (2017). Hardware-efficient signal generation of layered/enhanced ACO-OFDM for short-haul fiber-optic links. Optics Express, 25(12), 13359-13371. [More Information]
  • Boland, D., Cheng, C., Kahng, A., Leong, P. (2017). Reconfigurable Computing. In John G Webster (Eds.), Wiley Encyclopedia of Electrical and Electronics Engineering. (pp. 1-17). 10.1002/047134608X.W7603.pub3: Wiley.

2016

  • Shi, K., Boland, D., Constantinides, G. (2016). Efficient FPGA implementation of digit parallel online arithmetic operators. 2014 International Conference on Field- Programmable Technology (ICFPT), Danvers: (IEEE) Institute of Electrical and Electronics Engineers. [More Information]
  • Boland, D. (2016). Reducing memory requirements for high-performance and numerically stable Gaussian elimination. FPGA'16 The 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, New York: Association for Computing Machinery (ACM). [More Information]

2015

  • Shi, K., Boland, D., Constantinides, G. (2015). Imprecise datapath design: An overclocking approach. ACM Transactions on Reconfigurable Technology and Systems, 8(2), 1-23. [More Information]
  • Constantinides, G., Bayliss, S., Boland, D. (2015). Whither reconfigurable computing? In Wayne Luk, George A Constantindes (Eds.), Transforming Reconfigurable Systems, (pp. 19-38). London: Imperial College Press. [More Information]

2014

  • Shi, K., Boland, D., Stott, E., Bayliss, S., Constantinides, G. (2014). Datapath synthesis for overclocking: Online arithmetic for latency-accuracy trade-offs. 51st Annual Design Automation Conference (DAC 2014), New York: Association for Computing Machinery (ACM). [More Information]

2013

  • Boland, D., Constantinides, G. (2013). A scalable precision analysis framework. IEEE Transactions on Multimedia, 15(2), 242-256. [More Information]
  • Shi, K., Boland, D., Constantinides, G. (2013). Accuracy-performance tradeoffs on an FPGA through overclocking. 21st Annual International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2013), Piscataway: (IEEE) Institute of Electrical and Electronics Engineers. [More Information]
  • Shi, K., Boland, D., Constantinides, G. (2013). Overclocking datapath for latency-error tradeoff. 2013 IEEE International Symposium on Circuits and Systems (ISCAS 2013), Beijing: (IEEE) Institute of Electrical and Electronics Engineers. [More Information]
  • Boland, D., Constantinides, G. (2013). Revisiting the reduction circuit: a case study for simultaneous architecture and precision optimisation. 2013 12th International Conference on Field Programmable Technology (FPT 2013), Piscataway: (IEEE) Institute of Electrical and Electronics Engineers. [More Information]
  • Boland, D., Constantinides, G. (2013). Word-length optimization beyond straight line code. 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2013), New York: Association for Computing Machinery (ACM). [More Information]

2012

  • Boland, D., Constantinides, G. (2012). A Scalable Approach for Automated Precision Analysis. 2012 ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2012), New York: ACM Digital Library. [More Information]
  • Hammami, R., Boland, D., Capes, H., Christova, M., Marandet, Y., Rosato, J., Stamm, R. (2012). A Stark broadening simulation using a renewal process for the electric microfield. XXI International Conference on Spectral Line Shapes (ICSLS 2012), Bristol: IOP Publishing. [More Information]
  • Tan, X., Boland, D., Constantinides, G. (2012). FPGA paranoia: Testing numerical properties of FPGA floating point IP-cores. 8th International Symposium on Applied Reconfigurable Computing (ARC 2012), Berlin: Springer Verlag. [More Information]

2011

  • Boland, D., Constantinides, G. (2011). Bounding Variable Values and Round-Off Effects Using Handelman Representations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 30(11), 1691-1704. [More Information]
  • Boland, D., Constantinides, G. (2011). Optimizing Memory Bandwidth Use and Performance for Matrix-Vector Multiplication in Iterative Methods. ACM Transactions on Reconfigurable Technology and Systems, 4(3), 1-14. [More Information]
  • Stamm, R., Boland, D., Hammami, R., Capes, H., Catoire, F., Koubiti, M., Mekkaoui, A., Marandet, Y., Rosato, J., et al (2011). Stochastic processes applied to line shapes. Baltic Astronomy, 20(4), 540-547.
  • Le Lann, C., Boland, D., Constantinides, G. (2011). The Krawczyk Algorithm:Rigorous Bounds for Linear Equation Solution on an FPGA. 7th International Symposium on Applied Reconfigurable Computing (ARC 2011), Berlin: Springer Verlag. [More Information]

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