Outline

Overview

The purpose of this unit is to equip students with the skills to design simple digital logic circuits which comprise modules of larger digital systems. The following topics are covered: logic operations, theorems and Boolean algebra, number systems (integer and floating point), combinational logic analysis and synthesis, sequential logic, registers, counters, bus systems, state machines, simple CAD tools for logic design, and the design of a simple computer.

Unit details and rules

Academic unit	School of Electrical and Computer Engineering
Credit points	6
Prerequisites ?	None
Corequisites ?	None
Prohibitions ?	ELEC5722
Assumed knowledge ?	This unit of study assumes some knowledge of digital data representation and basic computer organisation
Available to study abroad and exchange students	No

Teaching staff

Coordinator	David Boland, david.boland@sydney.edu.au
Laboratory supervisor(s)	Thomas Huang, thomas.huang@sydney.edu.au
Laboratory supervisor(s)	Peter Jones, peter.jones@sydney.edu.au
Lecturer(s)	David Boland, david.boland@sydney.edu.au

Type	Description	Weight	Due	Length
Supervised exam ?	Final exam Verilog (modelsim/verilator) design activity based on labs/project.	40%	Formal exam period	2 hours
Outcomes assessed:
Assignment	Lab exercises Completion of lab exercises as groups is marked. (Sparkplus)	12.5%	Multiple weeks	n/a
Outcomes assessed:
Assignment	Lab project Verilog design exercise as a group. Assessment in Week 13 lab session.	27.5%	Multiple weeks	n/a
Outcomes assessed:
Small test	Combinational Logic Quiz Canvas Quiz (open book)	10%	Week 07	50 minutes
Outcomes assessed:
Small test	Sequential Logic and Timing Quiz Canvas Quiz (open book)	10%	Week 13	50 minutes
Outcomes assessed:
= group assignment ?

Assessment summary

Lab exercises: Total of 6 lab exercises, with 5 lab exercises assessed during lab sessions based on demonstrated work and understanding. Completed in groups and assessed individually.
Lab project: Major project running over 3 weeks, assessed during lab sessions based on demonstrated work and lab report. Completed in groups and assessed individually.
Final exam: Two hours during formal exam period.

Detailed information for each assessment can be found on Canvas.

Assessment criteria

The University awards common result grades, set out in the Coursework Policy 2014 (Schedule 1).

As a general guide, a high distinction indicates work of an exceptional standard, a distinction a very high standard, a credit a good standard, and a pass an acceptable standard.

Result name	Mark range	Description
High distinction	85 - 100
Distinction	75 - 84
Credit	65 - 74
Pass	50 - 64
Fail	0 - 49	When you don’t meet the learning outcomes of the unit to a satisfactory standard.

For more information see guide to grades.

Late submission

In accordance with University policy, these penalties apply when written work is submitted after 11:59pm on the due date:

Deduction of 5% of the maximum mark for each calendar day after the due date.
After ten calendar days late, a mark of zero will be awarded.

Academic integrity

The Current Student website provides information on academic integrity and the resources available to all students. The University expects students and staff to act ethically and honestly and will treat all allegations of academic integrity breaches seriously.

We use similarity detection software to detect potential instances of plagiarism or other forms of academic integrity breach. If such matches indicate evidence of plagiarism or other forms of academic integrity breaches, your teacher is required to report your work for further investigation.

Use of generative artificial intelligence (AI) and automated writing tools

You may only use generative AI and automated writing tools in assessment tasks if you are permitted to by your unit coordinator. If you do use these tools, you must acknowledge this in your work, either in a footnote or an acknowledgement section. The assessment instructions or unit outline will give guidance of the types of tools that are permitted and how the tools should be used.

Your final submitted work must be your own, original work. You must acknowledge any use of generative AI tools that have been used in the assessment, and any material that forms part of your submission must be appropriately referenced. For guidance on how to acknowledge the use of AI, please refer to the AI in Education Canvas site.

The unapproved use of these tools or unacknowledged use will be considered a breach of the Academic Integrity Policy and penalties may apply.

Studiosity is permitted unless otherwise indicated by the unit coordinator. The use of this service must be acknowledged in your submission as detailed on the Learning Hub’s Canvas page.

Outside assessment tasks, generative AI tools may be used to support your learning. The AI in Education Canvas site contains a number of productive ways that students are using AI to improve their learning.

Learning support

Simple extensions

If you encounter a problem submitting your work on time, you may be able to apply for an extension of five calendar days through a simple extension.  The application process will be different depending on the type of assessment and extensions cannot be granted for some assessment types like exams.

Special consideration

If exceptional circumstances mean you can’t complete an assessment, you need consideration for a longer period of time, or if you have essential commitments which impact your performance in an assessment, you may be eligible for special consideration or special arrangements.

Special consideration applications will not be affected by a simple extension application.

Using AI responsibly

Co-created with students, AI in Education includes lots of helpful examples of how students use generative AI tools to support their learning. It explains how generative AI works, the different tools available and how to use them responsibly and productively.

Weekly schedule

WK	Topic	Learning activity
Week 01	Introduction to digital logic	Lecture (2 hr)
Week 02	VHDL and implementing logic functions	Lecture and tutorial (5 hr)
Week 03	Combinational building blocks and VHDL	Lecture and tutorial (5 hr)
Week 04	VHDL building blocks, numbers and adders	Lecture and tutorial (5 hr)
Week 05	Comparators, adders and subtractors	Lecture and tutorial (5 hr)
Week 06	Flip-flops, latches and clocks	Lecture and tutorial (5 hr)
Week 07	Registers and counters	Lecture and tutorial (5 hr)
Week 08	Finite state machines	Lecture and tutorial (5 hr)
Week 09	Datapaths and control	Lecture and tutorial (5 hr)
Week 10	Processors, memory and branching	Lecture and tutorial (5 hr)
Week 11	Multipliers, dividers and timing	Lecture and tutorial (5 hr)
Week 12	Metastability and reconfigurable logic	Lecture and tutorial (5 hr)
Week 13	Synthesis, testing and exam review	Lecture and tutorial (5 hr)

Study commitment

Typically, there is a minimum expectation of 1.5-2 hours of student effort per week per credit point for units of study offered over a full semester. For a 6 credit point unit, this equates to roughly 120-150 hours of student effort in total.

Required readings

All readings for this unit can be accessed through the Library eReserve, available on Canvas.

Stephen Brown and Zvonko Vranesic, Fundamentals of Digital Logic with VHDL Design (3rd). McGraw-Hill, 2009. 978-0-07-352953-0

Learning outcomes

Learning outcomes are what students know, understand and are able to do on completion of a unit of study. They are aligned with the University's graduate qualities and are assessed as part of the curriculum.

Outcomes
Graduate qualities

At the completion of this unit, you should be able to:

LO1. design, fabricate and test the digital circuits and system in the laboratory
LO2. design combinational and sequential circuits and systems, using a clearly defined system based approach
LO3. understand how Boolean Algebrea can be used for the purpose of logic circuit analysis
LO4. describe basic digital logic building blocks such as logic gates, multiplexers, decoders, and PLAs
LO5. discuss how sequential logic components such as latches, flip-flops, registers and counters work
LO6. evaluate the performance of clocked sequential circuits
LO7. communicate effectively among the team members of the group.

Graduate qualities

The graduate qualities are the qualities and skills that all University of Sydney graduates must demonstrate on successful completion of an award course. As a future Sydney graduate, the set of qualities have been designed to equip you for the contemporary world.

GQ1	Depth of disciplinary expertise Deep disciplinary expertise is the ability to integrate and rigorously apply knowledge, understanding and skills of a recognised discipline defined by scholarly activity, as well as familiarity with evolving practice of the discipline.
GQ2	Critical thinking and problem solving Critical thinking and problem solving are the questioning of ideas, evidence and assumptions in order to propose and evaluate hypotheses or alternative arguments before formulating a conclusion or a solution to an identified problem.
GQ3	Oral and written communication Effective communication, in both oral and written form, is the clear exchange of meaning in a manner that is appropriate to audience and context.
GQ4	Information and digital literacy Information and digital literacy is the ability to locate, interpret, evaluate, manage, adapt, integrate, create and convey information using appropriate resources, tools and strategies.
GQ5	Inventiveness Generating novel ideas and solutions.
GQ6	Cultural competence Cultural Competence is the ability to actively, ethically, respectfully, and successfully engage across and between cultures. In the Australian context, this includes and celebrates Aboriginal and Torres Strait Islander cultures, knowledge systems, and a mature understanding of contemporary issues.
GQ7	Interdisciplinary effectiveness Interdisciplinary effectiveness is the integration and synthesis of multiple viewpoints and practices, working effectively across disciplinary boundaries.
GQ8	Integrated professional, ethical, and personal identity An integrated professional, ethical and personal identity is understanding the interaction between one’s personal and professional selves in an ethical context.
GQ9	Influence Engaging others in a process, idea or vision.

Outcome map

Learning outcomes	Graduate qualities
Learning outcomes

Responding to student feedback

This section outlines changes made to this unit following staff and student reviews.

We are modifying labs and lectures for some more Introduction to Verilog content.

Disclaimer

The University reserves the right to amend units of study or no longer offer certain units, including where there are low enrolment numbers.

To help you understand common terms that we use at the University, we offer an online glossary.

Current students

Overview

Overview

Unit details and rules

Teaching staff

Assessment

Assessment

Assessment summary

Assessment criteria

Late submission

Academic integrity

Learning support

Learning support

Simple extensions

Special consideration

Using AI responsibly

Weekly schedule

Weekly schedule

Study commitment

Required readings

Learning outcomes

Learning outcomes

Graduate qualities

Outcome map

Responding to student feedback

Responding to student feedback

Disclaimer

On this page

Useful links

Media

Student links

About us

Connect

Current students

ELEC9602: Digital Logic

Semester 1, 2023 [Normal day] - Remote

Overview

Overview

Unit details and rules

Teaching staff

Assessment

Assessment

Assessment summary

Assessment criteria

Late submission

Academic integrity

Learning support

Learning support

Simple extensions

Special consideration

Using AI responsibly

Weekly schedule

Weekly schedule

Study commitment

Required readings

Learning outcomes

Learning outcomes

Graduate qualities

Outcome map

Responding to student feedback

Responding to student feedback

Disclaimer

On this page

Useful links

Media

Student links

About us

Connect