Xueyuan Liu
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Miss Xueyuan Liu

Thesis work

Thesis title: Low latency digital modulation classification on FPGAs

Thesis abstract:

As the importance of wireless communications continues to grow and spectrum traffic becomes denser, the challenge of fast modulation classification increases. While modulation classification has been a well-studied problem, achieving high accuracy from a small number of samples is difficult. Our proposal builds on previous work by using an r-transformer-based network to identify a difficult open-source RadioML dataset. We obtain several network structures suitable for AMC (automatic modulation classification), and the network consisting of CNN and attention mechanism can rely on the least parameters and minimal model size to obtain the best performance, but the disadvantage is the requirement of the input sequence length, which can be circumvented in comparison to RT-based models. Compared to existing results, the network can achieve better accuracy with very few required parameters. On the other hand, a deep acceleration of neural network can be realized based on FPGA platform. FPGA has better performance than CPU and GPU with same resources due to its rewritable feature and custom architecture. The training of NN is based on CPUs and GPUs, however the hardware acceleration is based on FPGA. If we want to coordinate the two more efficiently, then the design of NN needs to be hardware-friendly, e.g., quantization or model compression techniques should be applied during training on CPU, only by doing so, we can obtain high performance on FPGA (fully utilizing its strengths), but also to reduce the accuracy’s degradation due to the use of quantization (since FPGA is not as suitable for floating point operations as CPU).